Cache

Accessing data concurrently may lead to issues!

It means that two different threads are trying to read and write the same variable at the same time. This is called a race condition.

Who is responsible for the CPU sharing?

A special element called a scheduler. There are three reasons for the scheduler to pause a thread:

• The CPU should be shared equally among threads

• The thread is waiting for some more data

• The thread is waiting for another thread to do something

Synchronization: Prevents a block of code to be executed by more than one thread at the same time.

All shared variables should be accessed in a synchronized or a volatile way.

Cache:

The minimize unit in CPU’ cache’ is a cache line (for nowadays, a common size of cache line in CPU is 64 byte). Thus when CPU read a variable from memory, it would read all variables nearby that variable. 

 

When core1 read variable a from memory, it would put variable b into cache at the same time.

if one variable has existed in two cache lines in different CPU cores possibly due to multithreading : 

When core1 update the variable a:

It would make core2’s cache miss when core2 read the variable b, even if variable b was not modified. So core2 would reload all variables in cache line from memory:

False sharing is a common problem in shared memory parallel processing. It occurs when two or more cores hold a copy of the same memory cache line.

That’s what false sharing is: one core update a variable would force other cores to update cache either. And all we know that CPU read variables from the cache are much faster than from memory. Thus while that variable always exists in multi-cores, that will significantly affect performance.

The common way to solve that problem is cache padding: padding some meaningless variables between variables. That would force one variable to occupy a core’s cache line alone, so when other cores update other variables would not make that core reload the variable from memory.

Non-uniform memory access is a computer memory design used in multiprocessing, where the memory access time depends on the memory location relative to the processor. Under NUMA, a processor can access its own local memory faster than non-local memory.

To Find cache hit and false sharing:

Caching can operate at three different levels of a Web application’s architecture:

1. The Web Server Layer

2. The Application Layer

3. The Database Layer

The most well known cache is the Web browser cache stored on a user’s machine. When a Web browser such as IE, Firefox or Chrome retrieves a resource, it doesn’t display it once and throw it away: it stores the content on the user’s local hard drive.

A Web server can use a number of techniques (discussed below) to instruct the Web browser when it is permissible to use this local copy of the content in lieu of downloading the content again from the Web server.

a). Expires header: tells a Web browser that a specific type of header expires at a specific day and time.

b). Cache-control header uses a combination of caching directives and age modifiers to instruct a Web client on whether a specific piece of content can or cannot be cached, and for how long.